Conventionally, a method has been known in which in order to efficiently realize a data processing series such as print image processing at high speed, all data processing is divided into prescribed functions so as to be provided by hardware; modules implemented using said hardware are then connected in the order of processing flow, and a data processing series is executed through pipelining. On the other hand, in image processing, processing can be efficiently realized by changing the order of a processing series.
For example, if an image is output to an output apparatus having a prescribed number of pixels, although resolution conversion is necessary in order to adjust the number of pixels (resolution), if the number of pixels of an input image is greater than the number of pixels of the output apparatus, it is better to perform processing after the number of pixels is reduced by performing resolution conversion upstream of processing. On the other hand, if the number of pixels of an input image is smaller than the number of pixels of the output apparatus, image quality is better if processing is performed in the state with a smaller number of pixels without performing resolution conversion and, thereafter, resolution conversion is performed immediately before output (downstream).
Further, for example, also in the case in which processing is performed after a certain space (for example, an input device space) is converted into standard space (for example, a resolution of 600 dpi and the CIELAB color space, or the like), and then the resultant space is converted into another space (for example, an output device space), the processing order is a problem. In other words, the processing order performed by a space conversion unit on an input side and that on an output side are opposite (the processing order of processing such as one-dimensional LUT, matrix operation, and three-dimensional LUT). That is, if the processing order can be changed, the same processing module can also be shared on the input side and the output side.
However, in data processing for performing pipeline processing using modules to which a prescribed function is assigned, the processing order cannot be changed. Accordingly, an example case as described above is handled by implementing a plurality of modules that have the same function, which is a waste in the efficient use of resources.
In order to solve the aforementioned problem, a configuration in which processing modules are connected via a ring shaped network is proposed (Japanese Patent Laid-Open No. 01-023340, Japanese Patent No. 2518293). According to these techniques, by changing the connection destination of data using such a ring shaped network, it is possible to change the processing order. Note that in the configuration disclosed in Japanese Patent No. 2518293, since each processing module is respectively executed by a processor, it is also possible to change the processing order by changing the program of each processor. Further, Japanese Patent No. 2834210 discloses a data flow control method in which expandability and maintainability have been improved by using broadcast communication.
However, in the configurations disclosed in Japanese Patent Laid-Open No. 01-023340 and Japanese Patent No. 2518293, the connecting relationship for processing data is set to one to one. Accordingly, it is not possible to control complicated data paths, such as separating a data path into branches (the same data being referenced by a plurality of modules), simultaneously executing a plurality of data paths, and performing time division multiplexing processing with a processing module.
Further, if broadcast communication is used as disclosed in the configuration of Japanese Patent No. 2834210, it is possible to separate a data path into branches (reference the same data by a plurality of modules). However, it is not possible to control complicated data paths, such as integrating data paths, simultaneously executing a plurality of data paths, and performing time division multiplexing processing with a processing module. Note that in the case of using broadcast communication, there is also a disadvantage in that the ring bus occupancy will increase since a transmission packet is not basically erased until it returns to a transmission source. Further, with the configuration disclosed in Japanese Patent No. 2834210, since a module in a state in which it is unable to receive erases a packet, after waiting one ring's worth of time or more, a transmission source starts retransmission processing. Accordingly, there has been a problem in that not only does control become complicated, but also transfer efficiency remarkably falls.